DFT Engineer | NVIDIA Job In Bangalore (JR1998729)

Job description:

NVIDIA is conducting an interview for the put up of DFT Engineer.

Duties and duties:

Design-for-Check Engineering at NVIDIA works on groundbreaking improvements involving crafting artistic options for DFT structure, verification and post-silicon validation on a few of the trade’s most advanced semiconductor chips.

• As a member in our crew, you may be liable for the design and implementation of state-of-the-art designs in check entry mechanisms, reminiscence BIST and scan compression.
• Your duty may even embrace verification and silicon bringup of Scan ATPG and different DFT options.
• As well as, you’ll assist develop and deploy DFT methodologies for our subsequent era merchandise.
• Be aside of innovation to attempt enhance the standard of DFT strategies.
• Additionally, you will have to work with multi-functional groups to include DFT options into the chip.
• Occasional journey and likewise some late hours on-line conferences concerned throughout crucial milestones.

Tasks:

• BSEE or MSEE from reputed establishments or equal expertise.
• 2+ Years of expertise ideally in Design for testability (DFT)
• You need to be nicely versed with static timing Evaluation, ECO, ASIC/Logic Design Circulation, HDL and Digital logic design.
• Expertise in RTL and Gates verification and simulation.
• It is advisable to be aware of BIST structure and JTAG/IEEE1149.1/IEEE1500.
• Robust DFT information in Scan ATPG, compression methods and reminiscence check.
• Robust analytical and downside fixing expertise.
• Knowledgeable coding expertise in trade commonplace scripting languages.
• Extraordinary written and oral communication expertise with the curiosity to work on uncommon challenges.

Job/Req. ID: JR1998729

Firm: NVIDIA

Location: Bangalore, KA

Job Class: VLSI  Engineering

Be part of all India VLSI Jobs group