SOC Design Verification – Intern | Rivoz Inc.
Description:
Rivoz is conducting an internship for Engineers.
Positions are open for six month or extra (the intern might be interning from Bangalore workplace) Co-op/Intern SOC verification engineers from unit degree to chip degree in addition to all features of verification resembling purposeful, microarchitecture, and formal specifically within the areas of DDR reminiscence, Ethernet, PCIe, and Cloth. We’re on the lookout for all ranges of expertise, from entrance to superior degree of expertise.
Obligations:
- Work carefully with structure and RTL designers on verifying the performance correctness of the design
- Reviewing Structure and Design Specs
- Develop take a look at plans and take a look at environments
- Develop assessments in meeting, C/C++, or vectors in response to take a look at plans
- Develop protection screens and analyze protection to make sure all of the take a look at instances within the plans are lined
- Develop checkers in SystemVerilog or C-base transactors to confirm the design
- Write assertions and apply formal verification to the designImplementing take a look at benches, producing directed/constrained random assessments
- Debugging failures, operating simulations, monitoring bugs
- Dealing with schedules and supporting multi-functional engineering effortAssisting in verification flows, automation scripts and regressions
Necessities:
- In-depth data of digital logic design, CPU/SOC structure and microarchitecture.
- Refined data of SystemVerilog.
- Skilled degree data C/C++.Related data of verification methodologies and instruments resembling simulators, waveform viewers, construct and run automation, protection assortment.
- Primary data of formal verification methodology is a plus.
- Glorious data of one of many scripting languages resembling Python, TCL is a plus.
- Glorious abilities in downside fixing, written and verbal communication, wonderful group abilities, and extremely self-motivated.
- Potential to work properly in a workforce and be productive beneath aggressive schedules.
Training And expertise:
- PhD, Grasp’s Diploma or Bachelor’s Diploma in technical topic space.
Job/Req. ID: N/A
Firm: Rivoz Inc.
Location: Bangalore, KA
Job Class: VLSI Engineering
Be a part of all India VLSI Jobs Telegram Group
